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Mfr. Part # EP20K200EBC356-1X

EP20K200EFC672-2

Manufacturer IntelIntel
Description

FPGA - Field Programmable Gate Array CPLD - APEX 20K 832 Macro 271 IOs

FPGA APEX 20K Family 200K Gates 8320 Cells 205MHz 0.22um Technology 1.8V 672-Pin FBGA

Datasheet
RoHS
Specifications

Mounting Type

Surface Mount

Surface Mount

Package / Case

356-LBGA

672-BBGA

Surface Mount

YES

YES

Number of I/Os

271

376

Operating Temperature

0°C~85°C TJ

0°C~85°C TJ

Packaging

Tray

Tray

Series

APEX-20KE®

APEX-20KE®

JESD-609 Code

e0

e0

Part Status

Obsolete

Obsolete

Moisture Sensitivity Level (MSL)

3 (168 Hours)

3 (168 Hours)

Number of Terminations

356

672

ECCN Code

3A991

3A991

Terminal Finish

Tin/Lead (Sn/Pb)

Tin/Lead (Sn/Pb)

HTS Code

8542.39.00.01

8542.39.00.01

Voltage - Supply

1.8V

1.8V

Terminal Position

BOTTOM

BOTTOM

Terminal Form

BALL

BALL

Peak Reflow Temperature (Cel)

220

220

Terminal Pitch

1.27mm

1mm

Reach Compliance Code

compliant

compliant

Time@Peak Reflow Temperature-Max (s)

30

30

Base Part Number

EP20K200

EP20K200

JESD-30 Code

S-PBGA-B356

S-PBGA-B672

Number of Outputs

263

368

Qualification Status

Not Qualified

Not Qualified

Power Supplies

1.81.8/3.3V

1.81.8/3.3V

Propagation Delay

1.58 ns

1.97 ns

Number of Inputs

263

368

Programmable Logic Type

LOADABLE PLD

LOADABLE PLD

Number of Logic Elements/Cells

8320

8320

Total RAM Bits

106496

106496

Number of Gates

526000

526000

Number of LABs/CLBs

832

832

Output Function

MACROCELL

MACROCELL

Number of Dedicated Inputs

4

4

Length

35mm

27mm

Height Seated (Max)

1.63mm

3.5mm

Width

35mm

27mm

RoHS Status

Non-RoHS Compliant

Non-RoHS Compliant

Clock Frequency

-

160MHz

Pricing(USD)
Grads Price
-
-
Availability

-

-

Price

-

-

Quantity

In Stock