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Mfr. Part # EP2A15F672C9N

EP20K400EBC652-2

Manufacturer IntelIntel
Description

FPGA - Field Programmable Gate Array CPLD - APEX II 1664 Macro 492 IOs

FPGA - Field Programmable Gate Array CPLD - APEX 20K 1664 Macros 488 IO

Datasheet
RoHS
Specifications

Mounting Type

Surface Mount

Surface Mount

Package / Case

672-BBGA, FCBGA

652-BGA

Surface Mount

YES

YES

Number of I/Os

492

488

Operating Temperature

0°C~85°C TJ

0°C~85°C TJ

Packaging

Tray

Tray

Series

APEX II

APEX-20KE®

JESD-609 Code

e1

e0

Part Status

Obsolete

Obsolete

Moisture Sensitivity Level (MSL)

3 (168 Hours)

3 (168 Hours)

Number of Terminations

672

652

ECCN Code

3A991

3A001.A.7.A

Terminal Finish

Tin/Silver/Copper (Sn/Ag/Cu)

Tin/Lead (Sn/Pb)

HTS Code

8542.39.00.01

8542.39.00.01

Voltage - Supply

1.5V

1.8V

Terminal Position

BOTTOM

BOTTOM

Terminal Form

BALL

BALL

Peak Reflow Temperature (Cel)

245

220

Terminal Pitch

1mm

1.27mm

Reach Compliance Code

compliant

compliant

Time@Peak Reflow Temperature-Max (s)

40

30

Base Part Number

EP2A15

EP20K400

JESD-30 Code

S-PBGA-B672

S-PBGA-B652

Number of Outputs

480

480

Qualification Status

Not Qualified

Not Qualified

Power Supplies

1.51.5/3.3V

1.81.8/3.3V

Propagation Delay

2.23 ns

1.83 ns

Number of Inputs

480

480

Programmable Logic Type

LOADABLE PLD

LOADABLE PLD

Number of Logic Elements/Cells

16640

16640

Total RAM Bits

425984

212992

Number of Gates

1900000

1052000

Number of LABs/CLBs

1664

1664

Output Function

MACROCELL

MACROCELL

Length

27mm

45mm

Height Seated (Max)

2.1mm

3.5mm

Width

27mm

45mm

RoHS Status

RoHS Compliant

Non-RoHS Compliant

Number of Dedicated Inputs

-

4

Pricing(USD)
Grads Price
-
-
Availability

-

-

Price

-

-

Quantity

In Stock