| Mfr. Part # | EP2A40F672C9 | EP20K1000EFC672-1 |
| Manufacturer | Intel | Intel |
| Description | FPGA - Field Programmable Gate Array CPLD - APEX II 2560 Macro 492 IO | FPGA - Field Programmable Gate Array CPLD - APEX 20K 2560 Macros 508 IO |
| Datasheet | ||
| RoHS | ||
| Specifications | ||
Mounting Type | Surface Mount | Surface Mount |
Package / Case | 672-BBGA, FCBGA | 672-BBGA |
Surface Mount | YES | YES |
Number of I/Os | 492 | 508 |
Operating Temperature | 0°C~85°C TJ | 0°C~85°C TJ |
Packaging | Tray | Tray |
Series | APEX II | APEX-20KE® |
JESD-609 Code | e0 | e0 |
Part Status | Obsolete | Obsolete |
Moisture Sensitivity Level (MSL) | 3 (168 Hours) | 3 (168 Hours) |
Number of Terminations | 672 | 672 |
ECCN Code | 3A001.A.7.A | 3A001.A.7.A |
Terminal Finish | Tin/Lead (Sn/Pb) | Tin/Lead (Sn/Pb) |
HTS Code | 8542.39.00.01 | 8542.39.00.01 |
Voltage - Supply | 1.425V~1.575V | 1.71V~1.89V |
Terminal Position | BOTTOM | BOTTOM |
Terminal Form | BALL | BALL |
Peak Reflow Temperature (Cel) | 220 | 220 |
Terminal Pitch | 1mm | 1mm |
Reach Compliance Code | compliant | compliant |
Time@Peak Reflow Temperature-Max (s) | 30 | 30 |
Base Part Number | EP2A40 | EP20K1000 |
JESD-30 Code | S-PBGA-B672 | S-PBGA-B672 |
Number of Outputs | 480 | 500 |
Qualification Status | Not Qualified | Not Qualified |
Power Supplies | 1.51.5/3.3V | 1.81.8/3.3V |
Propagation Delay | 2.05 ns | 1.84 ns |
Number of Inputs | 480 | 500 |
Programmable Logic Type | LOADABLE PLD | LOADABLE PLD |
Number of Logic Elements/Cells | 38400 | 38400 |
Total RAM Bits | 655360 | 327680 |
Number of Gates | 3000000 | 1772000 |
Number of LABs/CLBs | 3840 | 3840 |
Output Function | MACROCELL | MACROCELL |
Width | 27mm | 27mm |
Length | 27mm | 27mm |
Height Seated (Max) | 2.1mm | 3.5mm |
RoHS Status | Non-RoHS Compliant | Non-RoHS Compliant |
Clock Frequency | - | 160MHz |
Number of Dedicated Inputs | - | 4 |
| Pricing(USD) | ||
| Grads Price | - | - |
| Availability | - | - |
| Price | - | - |
| Quantity |
In Stock
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