AD9520-5 Output Clock Generator: Pinout, Equivalent and AD9520 PLL

The following figure is the diagram of AD9520-5 pinout.

Pinout

The following is the Footprint of AD9520-5.

Footprint

The AD9520-5 provides a multioutput clock distribution function with subpicosecond jitter performance, along with an on-chip PLL that can be used with an external VCO. The AD9520 serial interface supports both SPI and I²C® ports. An in-package EEPROM can be programmed through the serial interface and store user-defined register settings for power-up and chip reset. The AD9520 features 12 LVPECL outputs in four groups. Any of the 1.6 GHz LVPECL outputs can be reconfigured as two 250 MHz CMOS outputs. Each group of outputs has a divider that allows both the divide ratio (from 1 to 32) and the phase (coarse delay) to be set. The AD9520 is available in a 64-lead LFCSP and can be operated from a single 3.3 V supply. The external VCO can have an operating voltage up to 5.5 V. A separate output driver power supply can be from 2.375 V to 3.465 V. The AD9520 is specified for operation over the standard industrial range of −40°C to +85°C.

This article provides you with a basic overview of the AD9520-5 Output Clock Generator, including its pin descriptions, features and specifications, etc., to help you quickly understand what AD9520-5 is.

● Low phase noise, phase-locked loop (PLL)

● Supports external 3.3 V/5 V VCO/VCXO to 2.4 GHz

● 1 differential or 2 single-ended reference inputs

● Accepts CMOS, LVDS, or LVPECL references to 250 MHz

● Accepts 16.67 MHz to 33.3 MHz crystal for reference input

● Optional reference clock doubler

● Reference monitoring capability

● Auto and manual reference switchover/holdover modes, with selectable revertive/nonrevertive switching

● Glitch-free switchover between references

● Automatic recovery from holdover

● Digital or analog lock detect, selectable

● Optional zero delay operation

● Twelve 1.6 GHz LVPECL outputs divided into 4 groups

● Each group of 3 has a 1-to-32 divider with phase delay

● Additive output jitter as low as 225 fs rms

● Channel-to-channel skew grouped outputs <16 ps

● Each LVPECL output can be configured as 2 CMOS outputs (for f_OUT ≤ 250 MHz)

● Automatic synchronization of all outputs on power-up

● Manual synchronization of outputs as needed

● SPI- and I²C-compatible serial control port

● 64-lead LFCSP

● Nonvolatile EEPROM stores configuration settings

The AD9520 can be configured in several ways. These configurations must be set up by loading the control registers. The AD9520 includes on-chip PLL blocks that can be used with an external VCO or VCXO to create a complete phase-locked loop. The AD9520 PLL is useful for generating clock frequencies from a supplied reference frequency. This includes conversion of reference frequencies to much higher frequencies for subsequent division and distribution. The AD9520 provides an ALD function that can be selected for use at the LD pin. There are two operating modes for ALD: N-channel open-drain lock detect. P-channel open-drain lock detect.

The AD9520 PLL has a holdover function. Holdover is implemented by placing the charge pump in a high impedance state. This function is useful when the PLL reference clock is lost. The AD9520 serial control port is a flexible, synchronous serial communications port that allows an easy interface with many industry-standard microcontrollers and microprocessors. The AD9520 contains an internal EEPROM (nonvolatile memory). The EEPROM can be programmed by users to create and store a user-defined register setting file when the power is off. This setting file can be used for power-up and chip reset as a default setting. The EEPROM size is 512 bytes.

Analog Devices Inc. AD9520-5BCPZ technical specifications, attributes, parameters and parts with similar specifications to Analog Devices Inc. AD9520-5BCPZ.

The following is the Block Diagram of AD9520-5.

Functional Block Diagram

Detailed Block Diagram

● Low jitter, low phase noise clock distribution

● Clock generation and translation for SONET, 10Ge, 10G FC, and other 10 Gbps protocols

● Forward error correction (G.710)

● Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs

● High performance wireless transceivers

● ATE and high performance instrumentation

● Broadband infrastructures

The following diagram shows the AD9520-5 package.

Outline Dimensions

Analog Devices (NASDAQ: ADI) is a world leader in the design, manufacture, and marketing of a broad portfolio of high performance analog, mixed-signal, and digital signal processing (DSP) integrated circuits (ICs) used in virtually all types of electronic equipment. Since our inception in 1965, we have focused on solving the engineering challenges associated with signal processing in electronic equipment. Used by over 100,000 customers worldwide, our signal processing products play a fundamental role in converting, conditioning, and processing real-world phenomena such as temperature, pressure, sound, light, speed, and motion into electrical signals to be used in a wide array of electronic devices.

Download datasheets and manufacturer documentation for Analog Devices Inc. AD9520-5BCPZ.