The ADM485 is a differential line transceiver, suitable for high-speed two-way data communication on multipoint bus transmission lines. It is designed for balanced data transmission and complies with EIA standards RS-485 and RS-422. This part contains a differential line driver and a differential line receiver. Both the driver and the receiver can be enabled independently. When disabled, the output is tri-stated.
The ADM485 is powered by a single 5 V power supply. The thermal shutdown circuit prevents excessive power consumption caused by bus contention or output short circuits. If a significant temperature rise is detected in the internal driver circuit under fault conditions, this function will force the driver output into a high impedance state. Up to 32 transceivers can be connected to a bus at the same time, but only one driver can be enabled at any time. Therefore, it is important that the rest of the disabled drivers do not load the bus. To ensure this, the ADM485 driver has a high output impedance when disabled and powered down, thereby minimizing the loading effect when the transceiver is not used. The high-impedance driver output remains within the common-mode voltage range of -7 V to +12 V. The receiver contains a fail-safe function, if the input is not connected (floating), it will cause a logic high output state.
The ADM485 is manufactured using BiCMOS, which is an advanced hybrid technology process that combines low-power CMOS with fast switching bipolar technology. All inputs and outputs include ESD protection; all driver outputs have high source current and sink current capabilities. The epitaxial layer is used to prevent latch-up.
The ADM485 has extremely fast switching speed. The smallest driver propagation delay allows transmission at data rates up to 5 Mbps, while low skew minimizes EMI interference. The part is fully compliant with commercial and industrial temperature ranges, and is available in 8-pin PDIP, 8-pin SOIC and small, 8-pin MSOP packages.