AT45DB081E 8-Mbit DataFlash: Pinout, Features and Datasheet

Pinout

The followings are AT45DB081E Symbol, Footprint, and 3D Model.

Symbol

Footprint

3D Model

The AT45DB081E is a 1.7V minimum, serial-interface sequential access Flash memory ideally suited for a wide variety of digital voice, image, program code, and data storage applications. The AT45DB081E also supports the RapidS serial interface for applications requiring very high speed operation. Its 8,650,752 bits of memory are organized as 4,096 pages of 256 bytes or 264 bytes each. In addition to the main memory, the AT45DB081E also contains two SRAM buffers of 256/264 bytes each. The buffers allow receiving of data while a page in the main memory is being reprogrammed.

To allow for simple in-system re-programmability, the AT45DB081E does not require high input voltages for programming. The device operates from a single 1.7V to 3.6V power supply for the erase and program and read operations. The AT45DB081E is enabled through the Chip Select pin and accessed via a 3-wire interface consisting of the Serial Input (SI), Serial Output (SO), and the Serial Clock (SCK). All programming and erase cycles are self-timed.

This article provides you with a basic overview of the AT45DB081E 8-Mbit DataFlash, including its pin descriptions, features and specifications, etc., to help you quickly understand what AT45DB081E is.

● Single 1.7V - 3.6V supply

● Serial Peripheral Interface (SPI) compatible

   ◆ Supports SPI modes 0 and 3

   ◆ Supports RapidS™ operation

● Continuous read capability through entire array

   ◆ Up to 85MHz

   ◆ Low-power read option up to 15MHz

   ◆ Clock-to-output time (tV) of 6ns maximum

● User configurable page size

   ◆ 256 bytes per page

   ◆ 264 bytes per page (default)

   ◆ Page size can be factory pre-configured for 256 bytes

● Two fully independent SRAM data buffers (256/264 bytes)

   ◆ Allows receiving data while reprogramming the main memory array

● Flexible programming options

   ◆ Byte/Page Program (1 to 256/264 bytes) directly into main memory

   ◆ Buffer Write

   ◆ Buffer to Main Memory Page Program

● Flexible erase options

   ◆ Page Erase (256/264 bytes)

   ◆ Block Erase (2KB)

   ◆ Sector Erase (64KB)

   ◆ Chip Erase (8-Mbits)

● Program and Erase Suspend/Resume

● Advanced hardware and software data protection features

   ◆ Individual sector protection

   ◆ Individual sector lockdown to make any sector permanently read-only

● 128-byte, One-Time Programmable (OTP) Security Register

   ◆ 64 bytes factory programmed with a unique identifier

   ◆ 64 bytes user programmable

● Hardware and software controlled reset options

● JEDEC Standard Manufacturer and Device ID Read

● Low-power dissipation

   ◆ 400nA Ultra-Deep Power-Down current (typical)

   ◆ 4.5µA Deep Power-Down current (typical)

   ◆ 25µA Standby current (typical)

   ◆ 11mA Active Read current (typical at 20MHz)

● Endurance: 100,000 program/erase cycles per page minimum

● Data retention: 20 years

● Complies with full industrial temperature range

● Green (Pb/Halide-free/RoHS compliant) packaging options

   ◆ 8-lead SOIC (0.150" wide and 0.208" wide)

   ◆ 8-pad Ultra-thin DFN (5 x 6 x 0.6mm)

   ◆ 8-ball (2 x4 Array) Wafer Level Chip Scale Package

   ◆ Die in Wafer Form

The following is the Block Diagram of AT45DB081E.

Block Diagram

The following diagrams show the AT45DB081E Package.

Top View

Bottom View

Side View

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