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AT45DB321E SPI Serial Flash Memory: Pinout, Features and Datasheet

Memory Non-Volatile 8-UDFN Exposed Pad 32Mb 528Bytes x 8192 pages FLASH -40°C~85°C TC 2.3V~3.6V SPI 3V 85MHz 1.27mm Memory: Serial Flash; 32Mbit; SPI / RapidS; 85MHz; 2.3÷3.6V; uDFN8

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Nov 25, 2021

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Whiteboard Wednesday: Memory Extraction from SPI Flash Devices

 

Memory Non-Volatile 8-UDFN Exposed Pad 32Mb 528Bytes x 8192 pages FLASH -40°C~85°C TC 2.3V~3.6V SPI 3V 85MHz 1.27mm Memory: Serial Flash; 32Mbit; SPI / RapidS; 85MHz; 2.3÷3.6V; uDFN8

The Adesto® AT45DB321E is a 2.3V minimum, serial-interface sequential access Flash memory ideally suited for a wide variety of digital voice, image, program code, and data storage applications. The AT45DB321E also supports the RapidS serial interface for applications requiring very high speed operation. Furthermore, Huge range of Semiconductors, Capacitors, Resistors and IcS in stock. Welcome RFQ.

AT45DB321E-MHF-T

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AT45DB321E Pinout

The following figure is the diagram of AT45DB321E pinout.

AT45DB321E CAD Model

The followings are AT45DB321E Symbol, Footprint, and 3D Model.

PCB Symbol

 

PCB Footprint

 

3D Model

AT45DB321E Overview

The Adesto® AT45DB321E is a 2.3V minimum, serial-interface sequential access Flash memory ideally suited for a wide variety of digital voice, image, program code, and data storage applications. The AT45DB321E also supports the RapidS serial interface for applications requiring very high speed operation. Its 34,603,008 bits of memory are organized as 8,192 pages of 512 bytes or 528 bytes each. In addition to the main memory, the AT45DB321E also contains two SRAM buffers of 512/528 bytes each. The buffers allow receiving of data while a page in the main memory is being reprogrammed. Interleaving between both buffers can dramatically increase a system's ability to write a continuous data stream. The device is optimized for use in many commercial and industrial applications where high-density, low-pin count, low-voltage, and low-power are essential. To allow for simple in-system re-programmability, the AT45DB321E does not require high input voltages for programming. The device operates from a single 2.3V to 3.6V power supply for the erase and program and read operations.

This article provides you with a basic overview of the AT45DB321E SPI Serial Flash Memory, including its pin descriptions, features and specifications, etc., to help you quickly understand what AT45DB321E is.

AT45DB321E Features

● Single 2.3V - 3.6V supply

● Serial Peripheral Interface (SPI) compatible

   ◆ Supports SPI modes 0 and 3

   ◆ Supports RapidS™ operation

● Continuous read capability through entire array

   ◆ Up to 85MHz

   ◆ Low-power read option up to 15MHz

   ◆ Clock-to-output time (tV) of 6ns maximum

● User configurable page size

   ◆ 512 bytes per page

   ◆ 528 bytes per page (default)

   ◆ Page size can be factory pre-configured for 512 bytes

● Two fully independent SRAM data buffers (512/528 bytes)

● Flexible programming options

   ◆ Byte/Page Program (1 to 512/528 bytes) directly into main memory

   ◆ Buffer Write

   ◆ Buffer to Main Memory Page Program

● Flexible erase options

   ◆ Page Erase (512/528 bytes)

   ◆ Block Erase (4 KB)

   ◆ Sector Erase (64 KB)

   ◆ Chip Erase (32 Mbits)

● Program and Erase Suspend/Resume

● Advanced hardware and software data protection features

   ◆ Individual sector protection

   ◆ Individual sector lock-down to make any sector permanently read-only

● 128-byte, One-Time Programmable (OTP) Security Register

   ◆ 64 bytes factory programmed with a unique identifier

   ◆ 64 bytes user programmable

● Hardware and software controlled reset options

● JEDEC Standard Manufacturer and Device ID Read

● Low-power dissipation

   ◆ 400nA Ultra-Deep Power-Down current (typical)

   ◆ 3µA Deep Power-Down current (typical)

   ◆ 25µA Standby current (typical)

   ◆ 7mA Active Read current (typical)

● Endurance: 100,000 program/erase cycles per page minimum

● Data retention: 20 years

● Green (Pb/Halide-free/RoHS compliant) packaging options

   ◆ 8-lead SOIC (0.208" wide)

   ◆ 8-pad Ultra-thin DFN (5 x 6 x 0.6mm)

   ◆ Die in Wafer Form

Specifications

Adesto Technologies AT45DB321E-MHF-T technical specifications, attributes, parameters and parts with similar specifications to Adesto Technologies AT45DB321E-MHF-T.

AT45DB321E-MHF-T Tech Specifications

Adesto Technologies AT45DB321E-MHF-T technical specifications, attributes, parameters and parts with similar specifications to Adesto Technologies AT45DB321E-MHF-T.

Product Attribute Attribute Value
Factory Lead Time8 Weeks
Contact PlatingGold
MountSurface Mount
Mounting TypeSurface Mount
Package / Case8-UDFN Exposed Pad
Number of Pins8Pins
Memory TypesNon-Volatile
Operating Temperature-40°C~85°C TC
PackagingTape & Reel (TR)
Published1997
JESD-609 Codee4
Pbfree Codeyes
Part StatusActive
Moisture Sensitivity Level (MSL)1 (Unlimited)
Number of Terminations8Terminations
Voltage - Supply2.3V~3.6V
Terminal PositionDUAL
Peak Reflow Temperature (Cel)260
Product Attribute Attribute Value
Number of Functions1Function
Supply Voltage3V
Terminal Pitch1.27mm
Time@Peak Reflow Temperature-Max (s)NOT SPECIFIED
Pin Count8
Qualification StatusNot Qualified
Supply Voltage-Max (Vsup)3.6V
Power Supplies2.5/3.3V
Supply Voltage-Min (Vsup)2.3V
InterfaceSPI, Serial
Memory Size32Mb 528Bytes x 8192 pages
Nominal Supply Current22mA
Max Supply Current22mA
Clock Frequency85MHz
Access Time8 ns
Memory FormatFLASH
Memory InterfaceSPI
Data Bus Width8b
Product Attribute Attribute Value
Organization32MX1
Memory Width1
Write Cycle Time - Word, Page8μs, 4ms
Address Bus Width22b
Density32 Mb
Standby Current-Max0.000001A
Sync/AsyncSynchronous
Word Size8b
Programming Voltage2.7V
Serial Bus TypeSPI
Endurance100000 Write/Erase Cycles
Data Retention Time-Min20
Write ProtectionHARDWARE/SOFTWARE
Page Size512B
Length6mm
Height Seated (Max)0.6mm
RoHS StatusROHS3 Compliant
Lead FreeLead Free
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AT45DB321E Functional Block Diagram

The following is the Block Diagram of AT45DB321E.

Block Diagram

AT45DB321E Memory Array

The following is the Memory Architecture Diagram of AT45DB321E.

Sector Architecture

 

Block Architecture & Page Architecture

 

AT45DB321E Applications

● Digital voice

● Image

● Program code

● Data storage applications

AT45DB321E Package

The following diagram shows the AT45DB321E package.

Top View

 

Side View

 

Bottom View

AT45DB321E Manufacturer

Adesto Technologies provides application-specific and memory solutions optimized for the energy, data and security demands of IoT devices designed for the industrial, consumer, medical and communications markets. Adesto's Flagship memory family: DataFlash: Saves system energy, reduces board part count, saves microcontroller I/Os, widest operating voltage and power fail protection. Fusion: Designed for battery operated devices in the IoT space. Widest operating voltage and lowest standby current in the industry. Standard Flash: Lowest cost alternative, industry standard footprint and densities up to 128 Mb. Moneta: Industry's lowest power memory. Core voltage at 1.2 volts and 50 times lower power than competing data storage solutions.

Datasheet PDF

AT45DB321E-MHF-T Documents

Download datasheets and manufacturer documentation for AT45DB321E-MHF-T

Frequently Asked Questions

What is the essential property of the AT45DB321E?
The Adesto® AT45DB321E is a 2.3V minimum, serial-interface sequential access Flash memory ideally suited for a wide variety of digital voice, image, program code, and data storage applications.
How can AT45DB321E provide the best flexibility?
To provide optimal flexibility, the AT45DB321E memory array is divided into three levels of granularity comprising of sectors, blocks, and pages.
Where do the control instructions for the operation of the device come from?
The device operation is controlled by instructions from the host processor.
FAQ
What is the essential property of the AT45DB321E?
The Adesto® AT45DB321E is a 2.3V minimum, serial-interface sequential access Flash memory ideally suited for a wide variety of digital voice, image, program code, and data storage applications.
How can AT45DB321E provide the best flexibility?
To provide optimal flexibility, the AT45DB321E memory array is divided into three levels of granularity comprising of sectors, blocks, and pages.
Where do the control instructions for the operation of the device come from?
The device operation is controlled by instructions from the host processor.

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