TEXAS INSTRUMENTS CD4027BM Flip-Flop, Master/Slave, Complementary Output, Differential, Positive Edge, JK, 45 ns, 24 MHz
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Aug 10, 2021
Basil Katte
CD4027 based 4 bit up counter simulation in Proteus
TEXAS INSTRUMENTS CD4027BM Flip-Flop, Master/Slave, Complementary Output, Differential, Positive Edge, JK, 45 ns, 24 MHz
CD4027 is a dual package JK flip-flop IC. This article mainly introduce pinout,diagram, datasheet and other detailed information about Texas Instruments CD4027.
CD4027BM
| Quantity | Unit Price | Ext. Price |
|---|---|---|
| 1+ | $1.629 | $1.63 |
| 10+ | $1.5368 | $15.37 |
| 100+ | $1.44981 | $144.98 |
| 500+ | $1.36774 | $683.87 |
| 1000+ | $1.29032 | $1290.32 |
CD4027 is a CMOS based high voltage high speed Dual JK Flip-Flop that is generally used for data storing. The Flip-Flop could typically operate at a speed of 16MHz even at high voltages like 15V with a low noise margin of only 2.5V.
Two similar or equal JK flip flops are contained in the IC. Each pair of JK flip flop with IC has provision of pins J, K, set, reset along with clock and with two output terminals which are complimentary of each other.
JK flip flop can be employed in the applications like voice register, counters or else as a control circuit.
Symbol
Footprint
3D Model
●Dual JK Flip Flop Package IC
●Operating Speed: 16MHz( medium speed)
●Operating Voltage: 5V, 10V, 15V
●Maximum Operating Voltage: 20V
●Input Rise/Fall time at 5V : 45us
●Minimum High Level Input Voltage: 2 V
●Maximum Low Level Input Voltage: 0.8 V
●Available in 14-pin PDIP, GDIP, PDSO packages
●Static Flip-Flop Operation retains state indefinitely
●High noise immunity of 0.45 VDD(typ.)
●Set and Reset capability
●TTL compatible
●Low power of 50 nW (typ.)
●Set-reset capability
●With clock level either high or low
●Toggle rate at 10 V
●Standardized symmetrical output characteristics
●100% tested for quiescent current at 20 V
●Maximum input current of 1 μA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
●Noise margin (over full package-temperature range):
– 1 V at VDD = 5 V
– 2 V at VDD = 10 V
– 2.5 V at VDD = 15 V
Texas Instruments CD4027BM technical specifications, attributes, parameters and parts with similar specifications to Texas Instruments CD4027BM.
Texas Instruments CD4027BM technical specifications, attributes, parameters and parts with similar specifications to Texas Instruments CD4027BM.
| Product Attribute | Attribute Value | |
|---|---|---|
| Lifecycle Status | ACTIVE (Last Updated: 3 days ago) | |
| Factory Lead Time | 6 Weeks | |
| Contact Plating | Gold | |
| Mount | Surface Mount | |
| Mounting Type | Surface Mount | |
| Package / Case | 16-SOIC (0.154, 3.90mm Width) | |
| Number of Pins | 16Pins | |
| Weight | 141.690917mg | |
| Clock-Edge Trigger Type | Positive Edge | |
| Operating Temperature | -55°C~125°C TA | |
| Packaging | Tube | |
| Series | 4000B | |
| JESD-609 Code | e4 | |
| Pbfree Code | yes | |
| Part Status | Active | |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) | |
| Number of Terminations | 16Terminations | |
| ECCN Code | EAR99 |
| Product Attribute | Attribute Value | |
|---|---|---|
| Type | JK Type | |
| Voltage - Supply | 3V~18V | |
| Terminal Position | DUAL | |
| Terminal Form | GULL WING | |
| Peak Reflow Temperature (Cel) | 260 | |
| Supply Voltage | 5V | |
| Base Part Number | CD4027 | |
| Function | Set(Preset) and Reset | |
| Output Type | Differential | |
| Polarity | Non-Inverting | |
| Supply Voltage-Min (Vsup) | 3V | |
| Number of Channels | 2Channels | |
| Load Capacitance | 50pF | |
| Output Current | 6.8mA | |
| Clock Frequency | 24MHz | |
| Propagation Delay | 300 ns | |
| Quiescent Current | 20μA | |
| Turn On Delay Time | 45 ns |
| Product Attribute | Attribute Value | |
|---|---|---|
| Logic Function | AND, Flip-Flop, JK-Type | |
| Current - Quiescent (Iq) | 4μA | |
| Number of Bits per Element | 1 | |
| Max Propagation Delay @ V, Max CL | 90ns @ 15V, 50pF | |
| Trigger Type | Positive Edge | |
| Input Capacitance | 5pF | |
| Power Supply Current-Max (ICC) | 0.06mA | |
| Max Frequency@Nom-Sup | 3500000Hz | |
| Height | 1.75mm | |
| Length | 9.9mm | |
| Width | 3.91mm | |
| Thickness | 1.58mm | |
| REACH SVHC | No SVHC | |
| Radiation Hardening | No | |
| RoHS Status | ROHS3 Compliant | |
| Lead Free | Lead Free |
The CD4027 is a dual in-line JK flip flop IC. Meaning it has two JK flip flops inside it and each can be used individually based on our application. The term JK flip flop comes after its inventor Jack Kilby.
The JK flip flops are considered to be the most efficient flip-flop and can be used for certain applications on its own. The flip-flops are also called as latching devices meaning it can remember one single bit of data and latch the output based on it, due to this property they are commonly used as shift registers, control registers, storage registers or where ever a small memory is required.
More than one Flip Flop can be used in series to act as an EEPROM for holding small amount of data. The JK flip flop is considered to be more suitable for practical application because of its truth table that is the output of the flip flop will be stable for all types of inputs.
So if you are looking for a IC for latching purpose or to act as a small programmable memory for you project then this IC might be the right choice for you.
As told earlier we have two JK flip flops in this IC, the IC is powered by +5V typically the minimum and maximum input and output voltage for the input (J,K) pins and the output (Q, Q bar) pins are discussed in the specifications above. The below circuit shows a typical sample connection for the JK flip-flop.
The J and K pins are the input pins for the Flip-Flop and the Q and Q bar pins are the output pins. Note that the input pins are pulled down to ground through a 1k resistor or less, this way we can avoid the pin in floating condition. That is the pin will held to ground when the button is not pressed and when the button is pressed the pin will be held to supply voltage.
The reset button should be pulled up through a 1K resistor and when grounded will reset the flip-flop. The clock signal for the JK flip-flop is responsible for changing the state of the output. The flip-flop will change its output only during the rising edge of the clock signal. The clock signal here is just a push button but can be type of pulse like a PWM signal. The output state of the flip flops can be determined form the truth table below.
Normally during regular operation of the IC the reset pin will be set high and the clock pulse of known frequency will be supplied to the clock pin, then the value o J and K will be varied based on the input signals and the respective output will be obtained on the Q and Q bar pins. This region of operation in highlighted in red colour on the Truth table above.
●Shift Registers
●Voice registers and Memory or Control Registers
●EEPROM circuits
●Latching devices
●Registers, control circuits,Latching devices and Counters
●Computer memory circuits
Texas Instruments (TI) is an American technology company headquartered in Dallas, Texas, which designs and manufactures semiconductors and various integrated circuits, and sells them to electronic designers and manufacturers worldwide. It is one of the top 10 semiconductor companies in global sales. The company focuses on the development of analog chips and embedded processors, which account for more than 80% of its revenue. TI also produces TI digital light processing technology and educational technology products, including calculators, microcontrollers and multi-core processors. As of 2016, the company has 45,000 patents worldwide.
Download datasheets and manufacturer documentation for Texas Instruments CD4027BM.
Download datasheets and manufacturer documentation for CD4027BM
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