P82B96 Bipolar IC: Pinout, 3D Model and Datasheet

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3D Model

The P82B96 is a bipolar IC that creates a non-latching, bidirectional, logic interface between the normal I²C-bus and a range of other bus configurations. It can interface I²C-bus logic signals to similar buses having different voltage and current levels. For example, it can interface to the 350 µA SMBus, to 3.3 V logic devices, and to 15 V levels and/or low-impedance lines to improve noise immunity on longer bus lengths. It achieves this interface without any restrictions on the normal I²C-bus protocols or clock speed. The IC adds minimal loading to the I²C-bus node, and loadings of the new bus or remote I²C-bus nodes are not transmitted or transformed to the local node. Restrictions on the number of I²C-bus devices in a system, or the physical separation between them, are virtually eliminated. Transmitting SDA and SCL signals via balanced transmission lines (twisted pairs) or with galvanic isolation (opto-coupling) is simple because separate directional Tx and Rx signals are provided. The Tx and Rx signals may be directly connected, without causing latching, to provide an alternative bidirectional signal line with I²C-bus properties.

This article provides you with a basic overview of the P82B96, including its pin descriptions, features and specifications, etc., to help you quickly understand what P82B96 is.

■ Bidirectional data transfer of I²C-bus signals

■ Isolates capacitance allowing 400 pF on Sx/Sy side and 4000 pF on Tx/Ty side

■ Tx/Ty outputs have 60 mA sink capability for driving low-impedance or high capacitive buses

■ 400 kHz operation over at least 20 meters of wire (see AN10148)

■ Supply voltage range of 2 V to 15 V with I2C-bus logic levels on Sx/Sy side independent of supply voltage

■ Splits I²C-bus signal into pairs of forward/reverse Tx/Rx, Ty/Ry signals for interface with opto-electrical isolators and similar devices that need unidirectional input and output signal paths.

■ Low power supply current

■ ESD protection exceeds 3500 V HBM per JESD22-A114, 250 V DIP package, 400 V SO package MM per JESD22-A115, and 1000 V CDM per JESD22-C101

■ Latch-up free (bipolar process with no latching structures)

■ Packages offered: DIP8, SO8 and TSSOP8

■ Interface between I²C-buses operating at different logic levels (for example, 5 V and 3 V or 15 V)

■ Interface between I²C-bus and SMBus (350 µA) standard

■ Simple conversion of I²C-bu s SDA or SCL signals to multi-drop differential bus hardware, for example, via compatible         PCA82C250

■ Interfaces with opto-couplers to provide opto-isolation between I²C-bus nodes up to 400 kHz

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