STM32F407ZGT6 Microcontroller: Feature, Pinout and Datasheet

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3D Model

The STM32F407ZGT6 is based on the high-performance ARM® Cortex®-M4 32-bit RISC core operating at a frequency of up to 168 MHz. The Cortex-M4 core features a Floating point unit (FPU) single precision which supports all ARM singleprecision data-processing instructions and data types. It also implements a full set of DSP instructions and a memory protection unit (MPU) which enhances application security.

The STM32F407ZGT6 incorporates high-speed embedded memories (Flash memory up to 1 Mbyte, up to 192 Kbytes of SRAM), up to 4 Kbytes of backup SRAM, and an extensive range of enhanced I/Os and peripherals connected to two APB buses, three AHB buses and a 32-bit multi-AHB bus matrix. In the following articles, we will have a more detailed understanding of STM32F407ZGT6 model.

• Core: ARM® 32-bit Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait state execution from Flash memory, frequency up to 168 MHz, memory protection unit, 210 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions

• Memories

• Up to 1 Mbyte of Flash memory

• Up to 192+4 Kbytes of SRAM including 64-Kbyte of CCM (core coupled memory) data RAM

• Flexible static memory controller supporting Compact Flash, SRAM, PSRAM, NOR and NAND memories

• LCD parallel interface, 8080/6800 modes

• Clock, reset and supply management

– 1.8 V to 3.6 V application supply and I/Os

– POR, PDR, PVD and BOR

– 4-to-26 MHz crystal oscillator

– Internal 16 MHz factory-trimmed RC (1% accuracy)

– 32 kHz oscillator for RTC with calibration

– Internal 32 kHz RC with calibration

• Low-power operation

– Sleep, Stop and Standby modes

– VBAT supply for RTC, 20×32 bit backup registers + optional 4 KB backup SRAM

• 3×12-bit, 2.4 MSPS A/D converters: up to 24 channels and 7.2 MSPS in triple interleaved mode

• 2×12-bit D/A converters

• General-purpose DMA: 16-stream DMA controller with FIFOs and burst support

• Up to 17 timers: up to twelve 16-bit and two 32-bit timers up to 168 MHz, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input

• Debug mode

– Serial wire debug (SWD) & JTAG interfaces

– Cortex-M4 Embedded Trace Macrocell™

• Up to 140 I/O ports with interrupt capability

– Up to 136 fast I/Os up to 84 MHz

– Up to 138 5 V-tolerant I/Os

• Up to 15 communication interfaces

– Up to 3 × I2C interfaces (SMBus/PMBus)

– Up to 4 USARTs/2 UARTs (10.5 Mbit/s, ISO 7816 interface, LIN, IrDA, modem control)

– Up to 3 SPIs (42 Mbits/s), 2 with muxed full-duplex I2S to achieve audio class accuracy via internal audio PLL or external clock

– 2 × CAN interfaces (2.0B Active)

– SDIO interface

• Advanced connectivity

– USB 2.0 full-speed device/host/OTG controller with on-chip PHY

– USB 2.0 high-speed/full-speed device/host/OTG controller with dedicated DMA, on-chip full-speed PHY and ULPI

– 10/100 Ethernet MAC with dedicated DMA: supports IEEE 1588v2 hardware, MII/RMII

• 8- to 14-bit parallel camera interface up to 54 Mbytes/s

• True random number generator

• CRC calculation unit

• 96-bit unique ID

• RTC: subsecond accuracy, hardware calendar

The STM32F407ZGT6 is part of the STM32F4 family. They are fully pinto-pin, software and feature compatible with the STM32F2xx devices, allowing the user to try different memory densities, peripherals, and performances (FPU, higher frequency) for a greater degree of freedom during the development cycle.

The STM32F407ZGT6 operates in the –40 to +105 ℃ temperature range from a 1.8 to 3.6 V power supply. The supply voltage can drop to 1.7 V when the device operates in the 0 to 70 ℃ temperature range using an external power supply supervisor: refer to Section: Internal reset OFF. A comprehensive set of power-saving mode allows the design of low-power applications.

The STM32F407ZGT6 device maintains a close compatibility with the whole STM32F10xxx family. All functional pins are pin-to-pin compatible. The STM32F407ZGT6, however, are not drop-in replacements for the STM32F10xxx devices: the two families do not have the same power scheme, and so their power pins are different. Nonetheless, transition from the STM32F10xxx to the STM32F40xxx family remains simple as only a few pins are impacted.

block diagram

Power supply scheme

The maximum chip-junction temperature, TJ max, in degrees Celsius, may be calculated

using the following equation:

TJ max = TA max + (PD max x ΘJA)

Where:

• TA max is the maximum ambient temperature in ℃,

• ΘJA is the package junction-to-ambient thermal resistance, in ℃/W,

• PD max is the sum of PINT max and PI/O max (PD max = PINT max + PI/Omax),

• PINT max is the product of IDD and VDD, expressed in Watts. This is the maximum chip internal power.

PI/O max represents the maximum power dissipation on output pins where:

PI/O max = Σ (VOL × IOL) + Σ((VDD – VOH) × IOH),

taking into account the actual VOL / IOL and VOH / IOH of the I/Os at low and high level in the application.

Package thermal characteristics

LQFP144 package outline

LQFP144 marking example (package top view)

LQFP144 package recommended footprint

LQFP144  package mechanical data

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