TCA9548APWR I2C Switch: Circuit, Pinout, and Datasheet

The TCA9548APWR is a bidirectional translating  I2C  switch with eight channels. SC0/SD0-SC7/SD7 are the slave devices that receive the master SCL/SDA signal pair. Any of the eight downstream channels, as well as any combination of them, can be chosen.

The TCA9548APWR includes an active-low RESET input that resets the state machine and helps the device to recover if one of the downstream I2C buses becomes stuck in a low state. The device's state machine can also be reset by cycling the power supply, commonly known as a power-on reset, by cycling the power supply, VCC (POR). All channels are deselected when you use the RESET function or a POR.

The I2C data path connections are controlled by a single I2C master device that can communicate with numerous I2C slaves. After the slave address (hardware selectable by A0, A1, and A2 pins) is successfully acknowledged, a single 8-bit control register is written to or read from to determine the preferred channels.

The TCA9548APWR can also be used for voltage translation, letting 1.8-V, 2.5-V, or 3.3-V parts interact with 5-V parts by using various bus voltages on each SCn/SDn pair. External pull-up resistors are used to bring the bus up to the desired voltage for both the master and slave channels.

The following figure shows TCA9548APWR Pinout.

Pinout

The followings are TCA9548APWR Symbol, Footprint and 3D Model.

Symbol

Footprint

3D Model

• Pin savings on the I2C master, as each switch is activated or isolated through the I2C software

• Supports voltage-level translation for any bus voltages in the range of 1.65 V-5.5 V which is essential in mixed voltage I2C systems

• 1-to-8 Bidirectional translating switches

• I2C Bus and  SMBus  compatible

• Active-low reset input

• Three address pins, allowing up to eight TCA9548A devices on the I2C bus

• Channel selection through an I2C Bus, in any combination

• Power up with all switch channels deselected

• Low RON switches

• Allows voltage-level translation between 1.8-V, 2.5-V, 3.3-V, and 5-V buses

• No glitch on power up

• Supports hot insertion

• Low standby current

• Operating power-supply voltage range of 1.65 V to 5.5 V

• 5-V Tolerant inputs

• 0- to 400-kHz Clock frequency

• Latch-up performance exceeds 100 mA Per JESD 78, class II

•  ESD Protection  exceeds JESD 22

– ±2000-V Human-body model (A114-A)

– 200-V Machine model (A115-A)

– ±1000-V Charged-device model (C101)

The TCA9548APWR Functional Block Diagram is shown as follows.

Functional Block Diagram

The following figure shows an application in which the TCA9548APWR can be used.

Typical Application

One or more data pull-up voltages, VDPUX, are used in a typical TCA9548APWR application, one for the master device (VDPUM) and one for each of the configurable slave channels (VDPU0 – VDPU7). VDPUM = VDPUX = VCC if the master device and all slave devices are both powered by the same voltage. Additional design criteria must be considered when determining an adequate VCC voltage in an application where voltage translation is required.

The slave address of the TCA9548APWR is controlled via the A0, A1, and A2 pins, which are hardware configurable. In some applications, these ports can be connected directly to GND or VCC.

If the application activates numerous slave channels at the same time, the total IOL from SCL/SDA to GND on the master side equals the sum of the currents through all pull-up resistors, Rp.

The TCA9548APWR's pass-gate transistors are designed in such a way that the VCC voltage can be used to limit the maximum voltage that can be transmitted from one I2C bus to the next.

The following figure is TCA9548APWR Simplified Application Diagram.

Simplified Application Diagram

Common PCB layout principles must be followed for the TCA9548APWR's PCB layout, but additional considerations connected to high-speed data transfer, such as matching impedances and differential pairs, are not an issue for I2C signal speeds. A dedicated ground plane on an inner layer of the board is typical, and ground-connected pins must have a low-impedance path to the ground plane in the form of large polygon pours and many vias. To manage the voltage on the VCC pin, by-pass and de-coupling capacitors are typically employed, with a larger capacitor providing more power in the event of a short power supply glitch and a smaller capacitor filtering out high-frequency ripple.

Layout

All VDPUX voltages and VCC might be at the same potential in an application where voltage translation isn't necessary, and a single copper plane could link all of the pull-up resistors to the proper reference voltage. VDPUM and VDPU0 – VDPU7 may all be on the same layer of the board with split planes to separate distinct voltage potentials in an application where voltage translation is necessary.

Data lines (SCn and  SDn ) must be as short as feasible, and trace widths must be kept to a minimum (for example, 5-10 mils depending on copper weight) to reduce overall I2C bus capacitance added by PCB parasitics.

• Resolves I2C address conflicts

• I2C bus isolation

• I2C bus expansion

• Servers

• Routers (telecom switching equipment)

• Factory automation

• Products with I2C slave address conflicts (such as multiple, identical temperature sensors)

• Communications & Networking

The following figure is TCA9548APWR Package.

Package

Texas Instruments Incorporated (TI) is a Texas-based technology company that designs and manufactures semiconductors and integrated circuits for electronic designers and manufacturers all over the world. It is one of the top ten semiconductor companies in the world based on sales volume. The company's major focus is analog chips and embedded processors, which account for more than 80% of the company's sales. Calculators, microcontrollers, and multi-core processors, as well as TI digital light processing technologies and education technology, are all manufactured by TI.